I am a Research Scientist at IBM Research. At IBM, I work on Brain-inspired Computing Group, and in particular on the SyNAPSE project.

Before joining IBM, I was Sr. R&D Engineer at St. Jude Medical-CardioMEMs(acquired by Abbott). CadioMEMS Heart Failure system is part of St. Jude Medical’s tools for comprehensive heart failure care. CardioMEMS significantly reduces hospital admissions and improve quality of life of patients with serious heart conditions. I worked on prototype digital MEMs-based sensors to measure blood pressure and cardiac output. For more information, you can read here.

At Cornell, I was a Postdoctoral Research Associate working in the Asynchronous VLSI Group and Architecture led by Prof Rajit Manohar. My research interests at Cornell were VLSI, low-power clockless chips, security, sensor networks and CAD tools. You can find my CV/resume here. Last Updated: 2014.

My doctoral research focused in 4 main areas:

  • Ultra-low power VLSI circuits and architectures to enable ubiquitous computing and sensor networks: Design and understand energy efficient datapaths and architectures. Develop static power reduction techniques for asynchronous circuits.

  • Secure chips. Integrate circuits and mechanisms that enable low power devices to protect confidentiality and integrity of data

  • Trusted integrated circuits: Investigate how to exploit split-foundry design to allow protection of IP while fabricating integrated circuits in untrusted facilities

  • CAD tools: work on tools and methodologies that enable the widespread use of asynchronous circuits

The AVLSI group at Cornell does research in several areas that include but are not limited to: CAD tools, chip design, design automation, low power, neuromorphic circuits, security, theory, optimization.

Future work

Specific VLSI areas I am interested in are:

  • Low power architectures: Improve architectures and algorithms for the era of ubiquitous computing

  • Secure chips: Study of the properties that allow asynchronous integrated circuits to be more secure than their synchronous counterparts. I plan to study the properties at the design, synthesis and implementation level

  • Synthesis techniques for self-timed circuits: Analyze the trade offs among multiple QDI synthesis methods for datapath, memory, and control processes. Develop new or mixed decomposition techniques for sequential processes. Develop fast and accurate methods to evaluate the performance of asynchronous circuits at the micro-architectural level

  • DSP and mixed-signal IC: In the future, integrated circuits will sense our environment. I would like to study how analog coprocessors and analog datapaths together with self-timed circuits and non Von-Neuman architectures can improve the state-of-the-art on mobile DSPs

  • Real-time processing in self-timed circuits: Study analytic and practical characteristics of real-time systems in the context of asynchronous circuits, in particular, the implications of asynchrony in real-time systems

  • CAD tools: Develop tools that allow fast prototyping and verification and analog/digital sign-off of complex digital logic families

  • Post-CMOS era: Understand how mapping asynchronous process into new processes technologies will help circuit designers cope with the post-CMOS era

  • Interdisciplinary outreach. Collaborate with researchers in biology, medicine, robotics and other fields that could benefit from event-driven design